Logic operators that can be used in equation are:
•Logic AND: Entered as symbol * between variables. The output is in Assert state only if both variables are in that state.
•Logic OR: Entered as symbol + between variables. The output is in Assert if at least one of the two variables is in that state.
•Logic NOT: Entered as symbol ! in front of a variable. This operator reverses the state of the variable.
To describe timers and transmission delays in scheme logic equation, following operators are used:
•Transmission delay X @ Tx: Delay state transition of signal X by Tx seconds.
•Pickup delay timer X ^ Tc: Delay transition from Reset to Assert of signal X by constant Tc seconds.
•Dropout delay timer X ^ Tr: Delay transition from Assert to Reset of signal X by constant Tr seconds.
The following picture visualizes the operation of these timers: